IEC 63011-1:2018

Integrated circuits - Three dimensional integrated circuits - Part 1: Terminology

IEC 63011-1:2018 provides definitions pertaining to multichip integrated circuits, as vertically stacked dies using through-silicon vias (TSVs) or micro bumps. Terms and definitions related to the fabrication and test of the multichip integrated circuits are also provided.

OEN:

IEC

Langue:

English

Code(s) de l'ICS:

31.200

Statut:

Publié

Date de Publication:

2018-11-27

Numéro Standard:

IEC 63011-1:2018